ABLIC S-34HTS08AB EEPROM
ABLIC S-34HTS08AB EEPROM is a DDR5 Serial Presence Detect (SPD) EEPROM with a built-in hub function and temperature sensor. This EEPROM supports two types I2C (3.3V, 1MHz) and I3C (1V, 12.5MHz) communication. The S-34HTS08AB EEPROM can operate up to 12.5MHz on a 1V I3C basic bus or up to 1MHz on a 1V to 3.3V I2C bus. This EEPROM features 1V push-pull I/O levels, a Packet Error Check (PEC) function, In Band Interrupt (IBI), a bus reset function, and up to 8 unique addresses. The S-34HTS08AB EEPROM consists of 1024 bytes of non-volatile memory arranged as 16 blocks of 64 bytes per block. Each block can be write protected via software command.The S-34HTS08AB EEPROM includes a circuit that controls communication waveforms in the input and output circuits. The input circuit offers a dead time for input waveform shaking and achieves communication noise countermeasures. The output circuit includes overshoot/undershoot suppression. This EEPROM is used in DDR5 DIMM for data centers and servers (RDIMM, LRDIMM, and NVDIMM) and DDR5 DIMM for clients (SODIMM and UDIMM).
Features
- Two-wire I2C or I3C bus serial interface
- 1V push pull I/O levels
- 1V and 3.3V open drain I/O levels
- 1.7V to 1.98V operating voltage range (VDDSPD)
- 0.95V to 1.05V operating voltage range (VDDIO)
- Operating frequency:
- I2C:
- 1MHz maximum (VDDSPD = 1.7V to 1.98V)
- I3C:
- 12.5MHz maximum (VDDSPD = 1.7V to 1.98V)
- I2C:
- -40°C to 95°C operating temperature range (NVM write operation)
- Packet Error Check (PEC) function
- In Band Interrupt (IBI)
- Bus reset function
- Up to 8 unique addresses
- EEPROM:
- Sequential read
- Write protect function during low power supply voltage
- Individual software data protection for each of 16 blocks of 64 bytes per block
- 8K-bit memory capacity
- FFh initial delivery state
- Temperature sensor:
- 0.5°C typical (Ta = 75°C to 95°C)
- 1°C typical (Ta = 40°C to 125°C)
- 1°C hysteresis width
- Hub function:
- Interfaces to I2C/I3C buses, which have multiple devices on a shared bus
- Uniquely addressed with fixed addressing on the same bus
- All Hubs respond to specific predefined I2C/I3C device select codes on a host interface bus
- Integrates a second local I2C/I3C bus and passes through commands from the host bus onto a local bus for addressing I2C/I3C devices on the local bus
Applications
- DDR5 DIMM for data centers and servers (RDIMM, LRDIMM, and NVDIMM)
- DDR5 DIMM for clients (SODIMM and UDIMM)
Overview
公開: 2024-09-02
| 更新済み: 2024-09-08
