Atmel / Microchip ATmega644PA 8ビットAVR®マイクロコントローラ
Microchip ATmega644PA 8ビットAVR® CMOSマイクロコントローラは低消費電力で、AVR®拡張RISCアーキテクチャに基づいています。Atmel ATmega644PAは、パワフルな8ビットマイクロコントローラで、広範な組み込み制御アプリケーション向けの優れた柔軟性と費用対効果の高いソリューションが備わっています。ATmega644PAは、単一のクロックサイクルで最大131の強力な命令を使用することで、1MHzあたり1MIPSに近いスループットを実現しています。このプロセスを使用して設計者は、電力消費対処理速度に対してATmega644PAを最適化できます。32X8汎用ワーキング・レジスタには豊富な命令セットが搭載されており、Atmel AVR®コアに組み合わされています。32の汎用ワーキングレジスタは、演算論理ユニット(ALU)に直接接続されています。これによって、2つの独立したレジスタに単一の命令でアクセスでき、1クロックサイクルで実行され、従来のCISCマイクロコントローラより最大10倍速いスループットを達成できます。The ATmega644PA produces throughputs close to 1MIPS per MHz, by using up to 131 powerful instructions in a single clock cycle. Using this process, the designer can optimize the ATmega644PA for power consumption versus processing speed. The 32x8 general-purpose working registers with an extensive instruction set are combined in the Atmel AVR® core.
The 32 general-purpose working registers are directly connected to the Arithmetic Logic Unit (ALU). This allows two independent registers to be accessed in a single instruction and executed in one clock cycle to achieve throughputs up to ten times faster than conventional CISC microcontrollers.
特徴
- Advanced RISC architecture
- 131 Powerful instructions
- Most single clock cycle execution
- 32 x 8 General purpose working registers
- Fully static operation
- Up to 20MIPS throughput at 20MHz
- On-chip 2-cycle multiplier
- High endurance non-volatile memory segments
- 64KBytes of In-system self-programmable flash program
- Memory
- 2KBytes EEPROM
- 4KBytes Internal SRAM
- Write/Erase cycles: 10,000 Flash/100,000 EEPROM
- Data retention: 20 years at 85°C/100 years at 25°C
- Optional boot code section with independent lock bits
- In-system programming by an on-chip boot program
- True Read-While-Write Operation
- Programming Lock for Software Security
- Atmel QTouch® Library Support
- Capacitive Touch Buttons, Sliders, and Wheels
- QTouch and QMatrix acquisition
- Up to 64 Sense Channels
- JTAG (IEEE std. 1149.1 Compliant) Interface
- Boundary-scan Capabilities According to the JTAG Standard
- Extensive On-chip Debug Support
- Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
- 32 Programmable I/O Lines
- Packages: 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN
- Peripheral
- Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
- One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
- Real-Time Counter with Separate Oscillator
- 6 PWM Channels
- 8-channel 10-bit ADC
- Differential Mode with Selectable Gain at 1×, 10× or 200×
- 1 Byte-oriented 2-wire Serial Interface (Philips I2C compatible)
- 2 Programmable Serial USART
- 1 Master/Slave SPI Serial Interface
- Programmable Watchdog Timer with Separate On-chip Oscillator
- On-chip Analog Comparator
- Interrupt and Wake-up on Pin Change
- Power-on Reset and Programmable Brown-out Detection
- Internal Calibrated RC Oscillator
- External and Internal Interrupt Sources
- 6 Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby
- Speed Grades
- 0 - 4MHz @ 1.8V - 5.5V
- 0 - 10MHz @ 2.7V - 5.5V
- 0 - 20MHz @ 4.5 - 5.5V
- Power Consumption at 1MHz, 1.8V, 25°C
- Active Mode: 0.4mA
- Power-down Mode: 0.1μA
- Power-save Mode: 0.6μA (Including 32kHz RTC)
- Operating Voltage: 1.8V to 5.5V
Block Diagram
公開: 2017-07-12
| 更新済み: 2025-07-24
